The resetting of a random access memory customarily involves clearing or `zeroing` the contents of all of the storage locations or cells of the memory, typically by addressing each storage location and writing a `0` into each cell in response to the occurrence of a reset control signal. Because the transient peak current required to clear the entire memory array is quite large and may entail several clock cycles of the memory access clock, such a mechanism is undesirably slow and necessitates a substantial amount of semiconductor real estate in which to form the attendant current driver.
One approach to solve this problem, described in the U.S. Pat. No. to Liou et al 4,789,967, is to segment the resetting process into sub-portions or blocks of memory, in an effort to provide some degree of reduction in both reset current requirements and to provide a degree of improvement in reset speed (by resetting only selected portion or portions of memory of interest). Unfortunately, the resetting mechanism described in the Liou et al patent still requires applying a reset current directly to the memory itself, so that even though less than the entire memory may be selectively accessed, the reset operation still involves modifying the contents of a plurality of memory cells in each of the blocks of memory to be reset.